clock page 1 of 2 raltron electronics corp. 10651 n.w. 19 th st miami, florida 33172 u.s.a. phone: +001(305) 593-6033 fax: +001(305)594-3973 e-mail: sales@raltron.com internet: http:/www.raltron.com 13.96 max. 9 . 7 7 m a x . .550 max . 3 8 5 m a x . . 3 5 0 . 1 8 5 m a x . .018 typ. .100 typ. 2.54 typ. .46 typ. 4 . 7 0 m a x . .300 008 7.61 .20 . 0 3 0 . 7 6 8 . 8 8 9.77 .350 .185 max. .018 typ. .200 typ. 5.08 typ. .46 typ. 4.70 max. 7.61 .20 .030 .76 8.88 .385 .550 .300 008 9x14 pecl j-lead clock- pb free compliant (see page two for part numbering scheme) approvals raltron customer eng. approval, date: ronen 3/20/03 name (please print): sa l es app r o v a l , date : ti t l e (p l ease p rin t) : c r eated by, date : r o nen 3/ 2 0 /03 s i g n atu r e, date : revision: mechanical specification 6 pin version 4 pin version outline tolerance: 0.015? / 0.4mm (unless otherwise specified) pin functions (6 pins): [1] nc or comp. output [2] en / dis or nc [3] case / ground [4] output [5] comp. output or nc [6] supply voltage pin functions (4 pins): [1] e/ d or n/c or comp. out [2] case / ground [3] output [4] supply voltage marking (example): ce8950a-lz 155.520-t-c-el ral d/c electrical specification parameter symbol conditions value unit frequency, nom fo - 70.000~250.0 mhz supply voltage, nom. vcc vcc5% 3.3vdc 5.0vdc v supply current, max. (excluding load) is vcc=+3.3vdc/+5.0vdc ta=+25 c, 50 ? to vcc-2.0vdc load 100 ma pecl output level voh / vol vcc=+3.3vdc/+5.0vdc load=50 ? to vcc-2.0vdc 2.275 / 1.68 3.975/3.38 v duty cycle dc load=50 ? to vcc-2.0vdc / @50%vcc, ta=+25 c 40?60 or 45?55 % rise- / fall time, max. tr / tf 20%~80% vout, 80%~20% vout, max 0.100?1.0 (see note a) ns jitter, rms, max. j 1 , fj=12khz?20mhz 1.0 ps overall freq. stability, max. ? f/fc including operating temperature, 5% load & supply variations, calibration @+25 c, and 10 year aging see part number generation table ppm enable option en pin 2=low, vcc-1.620 (max.) enabled - disable option dis pin 2=high, vcc-1.025 (min.) pin 4 will assume a fixed level of logic ?0?, and pin 5 will assume a fixed level of logic?1? - operating temperature range ta - see part number generation table c storage temperature range t(stg) - -55?+90 c absolute voltage range vcc(abs) non-destructive, dc -0.5?+7.0 v 3/20/03 marketing-rfq, clock note a: rise and fall time values (tr/tf) are frequency dependent.
clock page 2 of 2 raltron electronics corp. 10651 n.w. 19 th st miami, florida 33172 u.s.a. phone: +001(305) 593-6033 fax: +001(305)594-3973 e-mail: sales@raltron.com internet: http:/www.raltron.com electrical test diagram for 3.3v pecl clock with comp. output ? part number generation note: 5/13/02rketing-rfq, vcxo 1 .variations from standard specification are available, please contact factory. 2.el is added at the end of the part number for all pecl clocks with enable/disable option. 3. c 1 suffix to be applied only when using the 6 pins package version part number example: ce8950a-lz- 1 55.520-t-c-el series overall stability rev temp. range ( c) frequency (mhz) options suffix pin sufix option co88: 5.0v pecl, no en/dis co89: 3.3v pecl, no en/dis ce88: 5.0v pecl, en/dis ce89: 3.3v pecl, en/dis 50: 50ppm 00: 100ppm a lv: 0?50 lz: 0?+70 hz: -20?+70 d3: -40?+85 70.000?250.0 t: 45?55 duty c: comp. output c1: comp. output pin 1 (see note 3) el (see note 2) 4: 4 pins
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